I have everything working very well now, musically speaking.
I put a tiny amount of latency correction on just the run signal, just about 200/96000 of a second. 200 samples.
So the run signal always gets to the machine just before the first clock pulse. I'm not sure if there will be any negative consequences from this at all, the more i think about it. And i know i can go lower than 200 but i'm leaving it there to be safe.

So as for the circuit i have going, i'll want to make sure i'm building something that lasts and won't fry itself. I'll get the AD829 chip and base it around that. I'll need to sort out the power though since currently i'm using a bench supply.

that should work. I can't remember where I read that the start/stop was delayed keyed on the leading edge of the temp clock. It would make sense because it would be the only way the cpu could get ready for the first count of the tempo clock. It probably won't make that much of a difference with an AD829. But I would recommend running each signal line through two 7404 ttl inverters to clean up the square wave signal.

This attached image has been performing very well so far.

So, i guess i'll go ahead and get the 7404 situation going too. But it's nice to know that this foundation circuit is performing reliably and will only get more refined.

If anyone sees some nonsense going on here, please let me know. I'm unsure about the 1megaohm value to ground at signal input before opamps, but the input signals sure liked it.

EDIT: please ignore the vertical crease in left area of page

Interesting stuff!

I've got a question, tho. Don't mind the ignorance

Why is the waveform in the scope only sloping on the 'going down' side?
It seems as if there is residual charge that has trouble getting away or something like that?
And wouldn't a high(ish) ohm resistor to ground help condition the signal in that respect?

Again, pardon the ignorance

BTW, i recently created a CV/Gate output out of my RME's headphone output with a home brew patch in Reaktor. I didn't seem to have these slopes. What i did get is some ringing from (presumably) the reconstruction filter that gave me some trouble with the CV signal.
I had to actually fix that with a simuation of an RC filter. So kindof the opposite of OPs problem!

I wish i knew exactly what causes the slope of the falling edge! This project is specifically to remove the slope, and it has worked out. The schematic drawn works great but i will be improving it with TTL standardization such as suggested by others.

The biggest hangup i have now is noise. When i plug in the resulting output of this circuit into the destination (sequencer), with a short cable to DIN, some background noise shows up on my console's master bus and probably throughout all channels. It's a high whine and some white noise, i suppose sounding like EMI. I've tried disconnecting the signal source (from the interface to the circuit input), I've tried swapping over to a linear regulated power supply instead of the unregulated one was using, and i've tried putting ferrite beads on the outputs of the circuit (clock and run).

Nothing changes the noise whatsoever. Once the circuit is powered up and plugged into the hardware input, the noise shows up.

And to compare, i powered up the TR-606 and connected it's DIN output to the same hardware destination and of course there is no noise from that.

So i know it's the circuit design/components itself causing this. I have it all on a small prototype board now, just a couple inches wide and long, instead of set up with lots of clips and wires all over the bench. So everything is consolidated.The noise was exactly the same when the circuit was splayed about though. I was hoping it would go down a lot when the circuit was consolidated onto the board.

Anyone have any pointers? I do have those two decoupling caps connected very close to the Vcc pin of the TL074. And all of the unused pins are grounded. Do i need to be setting up some more filtering? What about a capacitor to ground situation to filter out high frequency audio? Or an RC setup?

It may be that the ground return path through the connector can't handle all the new circuitry.
Here's a crazy idea (remember, noob speaking) : Maybe also try to separate the grounds of the signal and the supply for the TL074. Tho you would probably need a new source for the 5V offset.

I snipped the ground connection between audio interface and the input to this circuit, and that was it.
You never know where a ground loop comes from, and i always feel weird snipping it and wondering why the heck it still works!
I measured voltages all around and nothing changes when snipping the input ground, just the high hum goes away.
So, in the next week or so i'll work in the TTL stuff once i get chips in the mail..

Aah, yeah, makes sense. You can just separate the ground of the signal at the positive terminal and the rest (so the output of the opamp and the opamp supply and the 5V offset still share ground, right?).

there are several things that can be improved. the next time I'll explain. but we need to consider what the signal is coming from. so here is a circuit that should work. granted the coupling caps should be higher (like around 20uf @20V) and voltage supply of the op amp should be +15 on Vcc+ and -15 on Vcc-
this also removes the time delay as the comparator circuit is reference to signal ground on one side and actively biases the circuit on differential
so far it looks good on paper, but signal analysis is needed
this also eliminates the need for a dc coupled dac, and isolates the grounding of the i/o as now we are operating in ac coupled fully balanced operation:

this circuit will work without the coupling caps, but adding the caps isolate things completely and I would like to see if we can get around the dc coupling thing here.

pin 1 of the output of the dac is unused. only pins 2&3 from the dac

http://e2e.ti.com/cfs-file.ashx/__ke..._2D00_0001.JPG
hopefully you terminated your unused op amps properly

the slope is from the hysteresis circuit. but the balance square wave integrator I show in the last post eliminates that.

We were discussing the slope in the original DAC output (which presumably is also present in the signal generated by he software?)

And i'm still wondering why it only shows up on the way down.

I'm starting to think that it is generated in software to prevent a real-life sub-zero bounce of the reconstruction filter.

As i said before i have recently turned my audio interface into a CV/Gate output.
And i had problems with big changes producing ringing-like artifacts. So i simulated an RC filter (-6db slope) in the signal and that fixed it.

I can imagine the designers of the software had similar problems and wanted to make sure the analog side of the DAC would never go below 0.

the DAC output signal usually does swing positive to negative when it is an audio signal.

there are a couple of things in the DAC stages than can cause it. one of them is the corner frequency phase shift of the quantization filter.

The other is about the quirks associated with op amps:One of those are from the unity gain dampening compensation capacitor is not big enough to prevent oscillations at low frequencies when an non linear signal or signals that are dc offset (in this case, 4V offset)
They are not really used in logic circuits as there internal bias is set up for linear operation with signals and ones inside dac's are selected for audio use and not selected based on slew performance but noise performance. Do they go cheap on them yes they do. but op amps are not the best thing in the world either for DACs.

With ttl circuits, the bias of the transistors are switch like as they cycle from cut off and total saturation.

Well, no, not in the short term. If i make some funky bass sound on a synthesizer with several square waves then this kind of situation (from, say, max output to minimum output) would occur often. And those get reproduced without a problem.

But if all that was true (that it's a problem with the output stage) then it would occur with any signal that goes from maximum to zero. That doesn't sound like correct behaviour for a DAC.

Maybe it's good to note that this is all well within the audio band. That little slide there took up many samples. If it's anything like the 606 clock then the max frequency of this clock is 122Hz, according to this.
So at the fastest tempo (i think about 230bpm) it would cover about 36 samples (back of the envelope calc). At 'normal' tempo's that slide in the pictures would represent more than 70 samples (at an assumed tempo of 115bpm).

I would never think that this slide is a function of the DAC's. But again, noob here

yes it is as an audio wave swings negative to positive and rarely stops at the 0V crossing point regardless what shape the audio is.

now digital signals are different as they are logic high and low. in TTL the logic is +5V and 0V. CMOS logic is actually open ended as it is configurable, but in gate to gate on board applications 3.3V is high and 0V is low for CMOS i/o interconnects are 0 & 10V and +10V & -10V.

The synchronization pulse for DIN sync is actually the start/stop pulse. Roland used bad nomenclature that really only makes sense to them. If the designer named the pins according to the standard convention, it would be temp data instead of tempo clock and sync/strobe instead of start/stop.

before ADCs and DACs were used for audio they were set up for digital signals. The Vref (1/2 of the bit count bus ) on digital ADCs are set at 50% logic The Vref in audio ADCs are set to zero crossing. The Digital dac's are 0 to 10V pulsating dc at a rate up to 100Mhz. Audio DACs are up to 28V peak to peak AC signal with a bandwidth of 20Khz (typically) that has low pass and high pass filters in the dac stages.
older interfaces and other devices that were used in audio they used digital dacs re-purposed for audio. Now these days they design the DACs for the audio applications.

Still, with many synthetic sounds you can easily get a situation where you generate a pulse wave (peak to zero) on a regular basis. If this kind of filtering in the ammount we see on the scope pictures in OP is normal then that would have a huge sonic impact on such sounds. I can understand if this happens on a rate that's close to or above samplerate but that curve is very long in signal terms. It would be like a 500Hz filter on the downward flank. I don't think that any things you described (the analog post DAC circuitry) can account for that.


Interesting stuff! But i don't understand how this relates to this discussion?

ok. maybe I need to explain that an audio op amp's output is biased into class A operation and instrumentation op amps are class B bias. the difference is the instumentation DAC will never swing below 0V but the audio op amp will and 0V tracking on an audio op amp will be always skewed due to the class A biasing conditions inside the IC. As a matter of fact, this biasing into class A region cause low frequency phase shifts when the audio op amp is loaded down more than 2K ohms typically (because it goes hand in hand with another condition called current fold over).

more in loading is less in resistance. For example:
like the phase shift at 5hz at 150 ohms is 10x worse than at 10K ohm loading

That is why I think the line loading of 600 ohms is flawed and outdated standard because modern designs are op amp based transformer-less, so therefore the line standard should be 10K ohms.

an audio pulse wave of a synthesiser does not vary from 0VDC to 5VDC it would swing from -2.5VDC to +2.5VDC (in that example)

You need to read more carefully.
I said multiple pulse waves. And by pulse waves i actually mean common square waves.
If you have multiple square waves at the same frequencies but at different phases then you get all kinds of stair case waveforms that look like pulses etc. It's a common way of emulating PWM sound. A lot of them go from max to zero, stay there a bit, then shoot down to -max stay there a bit, then shoot up to zero, etc, etc, etc. So these waveforms do happen and in some contexts they occur often.
And if the DAC would exhibit the behaviour from the OP then these waves would sound wrong.
And , actually, i have played with such waves on the scope and i did not notice the problems OP shows. So the only conclusion i can make is that it is not an artefact of the DAC but is the result of the waveform generation in the software.

Ok, got it.
So if i understand correctly you propose that the 'slide to zero' from the OPs picture is due to phase shift?
But that would have to be symmetrical, wouldn't it?
The thing is, there is no anti-slide on the upgoing flank. If there was then i would understand it and filtering/phase shift would make a good explanation.
But you can't have phase shifts that only affect a portion of the signal, never mind only affects one slope of the signal, if that makes sense at all.

the phase shift effects settling time because it effecting a bias on a stage inside. All Audio IC's that I've come across have this. Video op amps have a servo bias inside and as for thier amplification specs it is required that at the worst case scenario, a .1% maximum phase shift and settling time is therefore in the nS and not mS.

Op amp manufacturers usually don't really publish this info individually, as it is the variables that make up the slew rate. and the higher the slew rate, the better the square wave performance. Also slew rate is effected by loading too. That is why they are guaranteed to perform that at 2Kohm and higher loads.

hence that is why I recommended the AD829 because of the 250V/us compared to the tl074 at 25V/us.

I'm going to redraw the balance square wave integrador using the proper loading values used in TTL and video. As the noise floor will be at -115db instead of -80db at loading.

I'm pretty new to op amps and i've got some tl074's but what i could decode from the specs is that these are not ideal for audio. I'm not sure what it was but it was some kind of frequency dependent parameter that put me off. Thanks for giving an alternative

This class A offset, that's actually just a virtual ground to get into the linear range of the op amp, right?
About the swing around zero/virtual ground, how long is this swing typically in audio applications?
And would this swing not neccesarily also occur at the top of a flank going from zero to max (instead of only when going from max to zero/virtual ground)?

In any case, thanks for the info you have given so far I'm learning a lot from it.

you run tl074 as a spilt rails: + and - 15V otherwise you have to deal with dc offsets.

I want to add it is not necessary to harp on the trailing edge. as when you take the conditioning circut and run them through two ttl gates it will be squared off. this is because anything above the 2V threshold clips to 5V on the output. when you invert twice it will do this on both sides of the square wave. that is why you can substitute an opto coupler or even a transistor in place of the op amp. All that really needs to happen is to take the balance signal, drive it to total clipping (-15 on low +15 on high) and chop the waveform at 0 and 5V then go through a set of inverters to clean the square wave

there are several ways to come up with a circuit. since we are already dealing with a square wave and balanced i/o, all that really needs to happen is to use a balanced to unbalanced unity gain buffer, then attenuate it a little and feed it through two inverters.

well, I was ridiculed/bashed a long time ago when I opened a discussion about op amps are not ideal and they are a cheap way to build interfaces and mixers

Since there is a couple of more op amps available, lets utilize them to increase the performance of the not so efficient TL074

in this circuit we pad a little on the way in then adjust the gain to the desired ttl signal. then later the potentiometer can be substituted with a couple of resistors.