There's no real straight answer here, in its simplest form I suppose you'd look at the MIPS (millions instructions per second) score and work backwards to figure out how many cycles per second and how much of that workload is being actioned per cycle, but that's not really telling you anything in the wider scope of things. It's all just as reliant on the other internal CPU interactions as well, with the memory controller and other low level processes needing to be taken into account, along with internal bussing and general efficiency of the silicon layout.

The was a time when the chips were fairly monolithic and generational die shrinks would mean more efficient solutions through packing more and more into the same space. Most chips (well, it gets more common the more cores you add) have moved to tile style designs now, with AMD's CCD blocks and intel using dies of various sizes depending on the task within the chip, so the interaction between these and the fine tuning of the internal data bus ends up playing into the overall performance.

That's really all a long arsed way of saying that's why general and task specific benchmarks exist. One way of processing in one chip might be more effective at achieving a result than the competing hardware. There's no singular technical figure however that will predict this and I've not even remotely touched on how software interacts, how it's optimized and possible limitations in how that might respond to any given hardware architecture.