Yep, I was talking about info from posts in the interface database thread. So basically what you are saying is that Thunderbolt via an external expansion chasis is where it should be (a hair higher than an internal PCIe slot) which still leaves Thunderbolt Interface drivers or implementation of Thunderbolt in the interface itself as a culprit for their real world higher than expected latency numbers (as reported in that thread).

Any PCIe card interface is also going to take advantage of it's FPGA chip programing (if its got one) regardless of whether in an internal PCIe slot or external Thunderbolt chasis.